Abstract
This chapter is dedicated to a theoretical investigation of the electrical behaviour of inductors and transmission lines integrated on thin silicon wafers. Using electromagnetic simulations, it is shown that thinning a standard silicon substrate to ˜20–70 μm yields a ˜20–30% increase in the maximum quality factor and resonance frequency of typical integrated spiral inductors. This improvement is due to a higher spreading substrate resistance between the inductor and the physical ground. However, further improvement of the quality factor requires substrates thinned to several microns in order to reduce the effect of stray electric fields induced between different points on the conductor, e.g., between adjacent windings. In the case of coplanar waveguide and microstrip transmission lines, significant improvement in device quality is only observed when silicon thickness reaches values below 10 μm. On highly conductive silicon, the behaviour of inductors and transmission lines as a function of substrate thickness becomes strongly dependent on silicon resistivity. In particular, thinning substrates with a resistivity in the 0.01–2 Ω-cm range may even have an adverse effect on device performance.
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Notes
- 1.
When an inductor is separately characterised, a metallic patch is placed near the device where the ground tips of the microwave probes are landed. But, in a circuit, such a ground patch may not be present. Even if present, there is no guarantee that it can effectively be connected to a common ground for all devices. Physically, the best choice is then to consider a point far away (infinity) as the true ground. This is what we adopt in our analysis.
- 2.
This is a semi-heuristic model which neglects the true distributed nature of the device. Nonetheless, such models have been proven functional, at least at low microwave frequencies, where inductors are often used.
- 3.
Since the Si substrate has a high relative dielectric constant (11.9) with respect to the environment, and is conductive, it provides a low-impedance path for the field lines. Thus, electric field lines tend to stay in the substrate.
- 4.
At frequencies where Q reaches its maximum value (less than 5 GHz in our examples), C sub,1,2 is practically bypassed by R sub,1,2, as the former’s reactance value is much higher than the latter’s. For that reason its effect on inductor behaviour is negligible.
- 5.
From quasi-static arguments it follows that this depth roughly equals min{t Si, (D o – D i)/2π}, where D o and D i denote the outer and inner radius of the inductor, respectively. On a sufficiently thin substrate, the depth simply equals the substrate thickness.
- 6.
If the overall impedance of the network connecting the two ports in Fig. 33.9 is Z s and the overall admittance of the network connecting the left port to the ground is Y g, then the complex propagation constant and characteristic impedance of the line follow from γl = (Z s Y g)1/2 and Z 0 = (Z s/Y g)1/2, respectively, where l is the segment length.
- 7.
The per-unit-length value of C ox can be estimated by the parallel-plate capacitor formula C ox = ε ox W MS/t ox with ε ox the dielectric constant and t ox thickness of the oxide layer. This is due to t ox/W MS being very small in our examples (<0.06). However, the Si thickness is generally not too small compared to W MS. As a result, the fringing field is not negligible, and C sub has to be approximated by the well-known formulas for microstrip lines built on a single dielectric layer.
- 8.
In contrast to CPW transmission lines the effective dielectric constant of MS lines in the slow wave region strongly depends on substrate thickness (Fig. 33.17). This has nothing to do with C ox, which determines the line capacitance in this mode of operation and is insensitive to t sub. Rather, the increase in ε eff with substrate thickness is caused by a higher line inductance (L s). When the vertical separation between the microstrip and the ground conductor becomes larger, the negative effect of (always present) ground currents on inductance is reduced. The resulting higher L s leads to a shorter propagation wavelength, which is interpreted as a higher ε eff.
- 9.
The main reason for the limited use of oxide-based MS lines is that, until recently, the maximum thickness of the oxide stack in a standard IC process did not exceed several microns. The resulting small vertical separation between the microstrip and ground conductors led to a low characteristic impedance limiting the applicability of such lines. Today’s processes allow the overall thickness of the dielectric to reach 10 μm, which alleviates this problem. Nonetheless, to achieve high characteristic impedances (>50 Ω) one is still better served by the CPW design.
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Rejaei, B. (2011). Microwave Passive Components in Thin Film Technology. In: Burghartz, J. (eds) Ultra-thin Chip Technology and Applications. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7276-7_33
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